A memory device having a three-dimensional structure is proposed, in which a memory hole is formed in a stacked body including a plurality of electrode layers stacked therein, and a charge storage film and a semiconductor film are provided in the memory hole so as to extend in the stacked direction of the stacked body. The memory device includes a plurality of memory cells that are connected in series between a drain side selection transistor and a source side selection transistor. The electrode layers in the stacked body are gate electrodes of the drain side selection transistor, the source side selection transistor and the memory cells. A gate electrode of a memory cell is a word line. There are three main capacities induced around a word line (i.e. parasitic capacities of word lines) such as line-to-line capacities between word lines, between a word line and a source line, and between a word line and a channel. When a parasitic capacity of the word line is large, for example, a programming speed becomes slower. In the memory device having the three-dimensional structure, the capacity between word line and channel composes almost half of the parasitic capacity of the word line in the program operation. It is desired in the program operation to reduce the capacity between word line and channel.